EDN

Non-intrusive instruction smart trace for 8051-derivative cores

Polish silicon IP company Digital Core Design has enhanced its 8051 portfolio with the functionality of an Instruction Smart Trace. Starting from the most popular DP8051, through the DP80390, to the ...
Embedded

Expand your 8051 memory

Suppose for a moment that you're an engineer designing a new 8051-based product. Not unexpectedly, the application's code size will greatly exceed the 64KB architectural limit of the 8051's program ...
Design-Reuse

8051 Core Executes up to 300 MIPS in Actel Axcelerator* FPGA

Multi-CPU, 8051 instruction-set-compatible parallel controller executes up to 300 MIPS in Actel Axcelerator FPGA and features concurrent real-time monitoring/debugging of all 9 CPUs via JTAG using ...
Design-Reuse

QuickCores Announces FREE 8051 CPU Soft Core with JTAG Debug

8051 instruction set compatible CPU soft core includes on-chip, real-time monitoring and debug capability, and is designed for implementation in Actel ProASICPLUS* re-programmable FPGAs PLANO, Texas, ...
Electronics Weekly

Updated: Micro-sequencing crams 8051 into tiny FPGA space

Californian start-up MicroCore Labs has announced an 8051 soft processor core, four of which will fit into 1227 LUTs on a Xilinx Artix-7 FPGA. The core is called MCL51. “Because it is based on a ...
EDN

Data choices help compress 8051 code

Some people think that programs for microcontrollers like the 8051 that have limited program memory must be written in assembly language rather than a high-level language like C. The executable code ...